High resolution FPGA DPWM based on variable clock phase shifting

Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. A. de Castro, "High resolution FPGA DPWM based on variable clock phase shifting" IEEE Transactions on Power Electronics – Letters section, vol.25, no.5, pp.1115 - 1119, mayo 2010This paper proposes a very high resolution DPWM architecture that takes advantage of an FPGA advanced clock management capability: the fine phase shifting of the clock. This feature is available in almost every FPGA nowadays, allowing very small and programmable delays between the input and output clocks. An original use of this fine phaseshifting pushes the limits of DPWM resolution. The experimental results show a time resolution of 19.5 ps in a Virtex-5 FPGA

MaxEnt and dynamical information

The MaxEnt solutions are shown to display a variety of behaviors (beyond the traditional and customary exponential one) if adequate dynamical information is inserted into the concomitant entropic-variational principle. In particular, we show both theoretically and numerically that power laws and power laws with exponential cut-offs emerge as equilibrium densities in proportional and other dynamics.Instituto de Física La PlataConsejo Nacional de Investigaciones Científicas y Técnica

Single ADC single loop power factor correction using pre-calculated duty cycles

Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. A. Sánchez, A. de Castro, and J. Garrido, "Single ADC single loop power factor correction using pre-calculated duty cycles", in 2013 15th European Conference on Power Electronics and Applications (EPE), Lille (France), 2013, pp. 1-6PFC controllers usually need three sensors. A digital implementation with pre-calculated duty cycles can reduce the number of sensors. The disadvantage of using pre-calculated duty cycles is that power factor is very sensitive to any non-idealities, so some kind of regulation is necessary. A single ADC and single loop technique is proposed and it obtains a high power factor under non-nominal conditions.This work has been partially supported by the Spanish Ministerio de Ciencia e Innovacion under project TEC2009-0987

A reconfigurable FPGA-based architecture for modular nodes in wireless sensor networks

Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. J. Portilla, T. Riesgo, and Á. de Castro, "A reconfigurable FPGA-based architecture for modular nodes in wireless sensor networks", 3rd Southern Conference on Programmable Logic, SPL 2007, Mar del Plata (Argentina), pp. 203 - 206A reconfigurable platform for sensor networks is presented. This platform has features that allow easy reuse of the node in several applications avoiding redesigning the system from scratch. The node includes an FPGA which is the core of the reconfiguration capabilities of the node. Several hardware interfaces for sensor standard protocols like I2C or PWM have been developed and implemented in the FPGA. Remote reconfiguration is an important feature and sensor networks can take advantage of it in order to improve the global performance

A comparison of simulation and hardware-in-the-loop alternatives for digital control of power converters

Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. A. Sánchez, Á. de Castro, J. Garrido, "A Comparison of Simulation and Hardware-in-the- Loop Alternatives for Digital Control of Power Converters", IEEE Transactions on Industrial Informatics, vol. 8, no. 3, pp. 491 - 500, Aug. 2012Debugging digital controllers for power converters can be a problem because there are both digital and analog components. This paper focuses on debugging digital controllers to be implemented in Field Programmable Gate Arrays or Application Specific Integrated Circuits, which are designed in hardware description languages. Four methods are proposed and described. All of them allow simulation, and two methods also allow emulation-synthesizing the model of the converter to run the complete closed-loop system in actual hardware. The first method consists in using a mixed analog and digital simulator. This is the easiest alternative for the designer, but simulation time can be a problem, specially for long simulations like those necessary in power factor correction or when the controller is very complex, for example, with embedded processors. The alternative is to use pure digital models, generating a digital model of the power converter. Three methods are proposed: real type, float type and fixed point models (in the latter case including hand-coded and automatic-coded descriptions). Float and fixed point models are synthesizable, so emulation is possible, achieving speedups over 20 000. The results obtained with each method are presented, highlighting the advantages and disadvantages of each one. Apart from that, an analysis of the necessary resolution in the variables is presented, being the main conclusion that 32-bit floating point is not enough for medium and high switching frequencies

Scale-invariance underlying the logistic equation and its social applications

On the basis of dynamical principles we i) advance a derivation of the Logistic Equation (LE), widely employed (among multiple applications) in the simulation of population growth, and ii) demonstrate that scale-invariance and a mean-value constraint are sufficient and necessary conditions for obtaining it. We also generalize the LE to multi-component systems and show that the above dynamical mechanisms underlie a large number of scale-free processes. Examples are presented regarding city-populations, diffusion in complex networks, and popularity of technological products, all of them obeying the multi-component logistic equation in an either stochastic or deterministic way.Instituto de Física La PlataConsejo Nacional de Investigaciones Científicas y Técnica

ALO: An ultrasound system for localization and orientation based on angles

This is the author’s version of a work that was accepted for publication in Microelectronics Journal. Changes resulting from the publishing process, such as peer review, editing, corrections, structural formatting, and other quality control mechanisms may not be reflected in this document. Changes may have been made to this work since it was submitted for publication. A definitive version was subsequently published in Microelectronics Journal, Vol 44, Issue 10, (October 2013). http://dx.doi.org/10.1016/j.mejo.2013.01.001This paper presents a low cost system based on ultrasound transducers to obtain the localization and orientation information of a mobile node, such as a robot, in a 2D indoor space. The system applies a new differential time of arrival (DTOA) technique with reduced computational cost, which is called ALO (angle localization and orientation). Instead of directly calculating its position, the system calculates the direction of arrival of the received ultrasonic signal and, through it, its position and orientation. A prototype of a robot has been built in order to show the validity of the method through experimental results

HALO4: Horizontal Angle Localization and Orientation System with 4 Receivers and Based on Ultrasounds

The final publication is available at Springer via http://dx.doi.org/10.1007/s10846-015-0283-2This paper presents a low cost ultrasonic localization and orientation system based on the DTOA (Differential Time Of Arrival) technique. The proposed system consists in deploying any number of autonomous nodes at the floor of a room and place some transmitters at the ceiling. Each node shall have four ultrasonic receivers to obtain the basic measures for the localization and orientation systems, and the coverage area of the system is defined by any region covered by at least three transmitters. The localization system is based on an estimation process of the horizontal angle of the node with respect to the transmitters. This implementation allows deploying the transmitters at different heights and ignores the error introduced by an incorrect estimation of the ultrasonic signal speed. The computational effort of the proposed system is greater than other ALO (Angle Localization and Orientation) systems, needing a minimization process to obtain the localization results, but it is smaller than in other typical techniques, like those based on the intersection of hyperboloids.This work has been supported by the Spanish Ministerio de Ciencia e Innovación under project TEC2009-09871

Orientación de la asignatura Sistemas Electrónicos Digitales al modelado de sistemas en VHDL partiendo de esquemas Matlab-Simulink

Versión extendida del texto publicado en Resúmenes de los Trabajos del VIII Congreso TAEE Universidad de Zaragoza Zaragoza, 2-4 Julio 2008Se propone una nueva orientación para la asignatura Sistemas Electrónicos Digitales donde se enseñe a los alumnos a modelar sistemas en VHDL partiendo de esquemas desarrollados en Matlab/Simulink para posteriormente abordar propuestas de controladores digitales sintetizables integrados en la descripción del sistema. De esta forma, la asignatura no sólo se dirige a alumnos de la intensificación sino que se puede incorporar a currículos multidisciplinares dentro de los estudios de ingeniería

ALO4: Angle localization and orientation system with four receivers

This paper presents a 2D indoor localization and orientation system based on a TDOA (Time Difference of Arrival) technique. It uses an array of receivers (four low-cost ultrasonic resonant devices in a square distribution) to implement low-computational-effort DOA (Direction of Arrival) algorithms, based on assumed plane-wave reception. The system only demands two transmitters at well-known positions on the ceiling of the room for obtaining the node position and orientation when it is deployed on the floor of the room. This system has been tested using a Xilinx Spartan-3A FPGA that implements a 52 MHz MicroBlaze. The experimental results include a total of 1,440 points, obtaining a mean localization error of 5.17 cm and a mean orientation error of 3.34 degrees. For this system, the localization and orientation processes are executed in less than 50 us.This work has been supported by the Spanish Ministerio de Ciencia e Innovacion under project TEC2009-0987